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Glossary

Elaboration

This term is used to describe the transformation of Scala SpinalHDL code into a HDL language such as Verilog of VHDL. For the purpose of the SpinalHDL documentation this is usually the meaning of the term.

Within the hardware enginering industry this term is also often used to describe parts of a flow for targetting hardware based on a particular technology (FPGA/ASIC/others). This may transform an input describption into an output description so the next layer of the flow may proceed towards building a hardware implementation.